JJAP Conference Proceedings

JJAP Conf. Proc. 4, 011201 (2016) doi:10.7567/JJAPCP.4.011201

Identification of double quantum dots in nanowire devices by single-gate sweeps

Hiroshi Inokawa1, Yasuo Takahashi2

  1. 1Research Institute of Electronics, Shizuoka University, Hamamatsu 243-8011, Japan
  2. 2Graduate School of Information Science and Technology, Hokkaido University, Sapporo 060-0814, Japan
  • Received September 29, 2015
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Abstract

The drain current-gate voltage characteristics of the double quantum dot devices are classified theoretically based on periodic multiple peaks separated by deep valleys, and are observed experimentally in silicon nanowire devices. Inspired by the unique patterns in the characteristics, delta-literals for multiple-valued logic are proposed as a new application of the double quantum dots.

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References

  1. 1 K. Uchida, J. Koga, R. Ohba, and A. Toriumi, IEEE Trans. Electron Devices 50, 1623 (2003).
  2. 2 R. Suzuki, M. Nozue, T. Saraya, and T. Hiramoto, Jpn. J. Appl. Phys. 52, 104001 (2013).
  3. 3 Y. Ono, K. Nishiguchi, A. Fujiwara, H. Yamaguchi, H. Inokawa, and Y. Takahashi, Appl. Phys. Lett. 90, 102106 (2007).
  4. 4 H. W. Liu, T. Fujisawa, Y. Ono, H. Inokawa, A. Fujiwara, K. Takashina, and Y. Hirayama, Phys. Rev. B 77, 073310 (2008).
  5. 5 H. Grabert and M. H. Devoret, Single Charge Tunneling (Plenum, New York, 1992) Chap. 3, p. 109.
  6. 6 C. Wasshuber, H. Kosina, and S. Selberherr, IEEE Trans. Comput. Aided Des. 16, 937 (1997).
  7. 7 S. Horiguchi, M. Nagase, K. Shiraishi, H. Kageshima, Y. Takahashi, and K. Murase, Jpn. J. Appl. Phys. 40, L29 (2001).
  8. 8 H. Inokawa, A. Fujiwara, and Y. Takahashi, Appl. Phys. Lett. 79, 3618 (2001).
  9. 9 H. Inokawa, A. Fujiwara, and Y. Takahashi, Jpn. J. Appl. Phys. 41, 2566 (2002).
  10. 10 H. Inokawa, A. Fujiwara, and Y. Takahashi, IEEE Trans. Electron Devices 50, 462 (2003).
  11. 11 K. Degawa, T. Aoki, T. Higuchi, H. Inokawa, and Y. Takahashi, IEICE Trans. Electron. E87C, 1827 (2004).
  12. 12 Y. Yasuda, Y. Tokuda, S. Zaima, K. Pak, T. Nakamura, and A. Yoshida, IEEE J. Solid-State Circuits 21, 162 (1986).